From 37f9596fb80fcf5fd38968fef57447d8a9082068 Mon Sep 17 00:00:00 2001
From: Martin Erhart <maerhart@outlook.com>
Date: Thu, 1 Jun 2023 17:59:48 +0200
Subject: [PATCH] Bump CIRCT

---
 circt                     |  2 +-
 src/circt-sys/build.rs    |  6 +++++-
 src/circt-sys/wrapper.h   |  1 -
 src/circt/src/cf.rs       |  9 +++------
 src/circt/src/llhd.rs     | 19 ++++++++-----------
 src/circt/src/mlir/mod.rs |  2 +-
 6 files changed, 18 insertions(+), 21 deletions(-)

diff --git a/circt b/circt
index e6290bbd4..24d394b5c 160000
--- a/circt
+++ b/circt
@@ -1 +1 @@
-Subproject commit e6290bbd4900ce9776581c53d8f07c44c73252c6
+Subproject commit 24d394b5c5821b1bc8dc90d3cf2576c1f37f8387
diff --git a/src/circt-sys/build.rs b/src/circt-sys/build.rs
index 31cb99f80..1bb1f7d2c 100644
--- a/src/circt-sys/build.rs
+++ b/src/circt-sys/build.rs
@@ -83,13 +83,16 @@ fn main() {
         "CIRCTMoore",
         "CIRCTSV",
         "CIRCTSeq",
+        "CIRCTSupport",
         "LLVMBinaryFormat",
         "LLVMBitstreamReader",
         "LLVMCore",
+        "LLVMDemangle",
         "LLVMRemarks",
         "LLVMSupport",
         "MLIRAnalysis",
-        "MLIRArithmeticDialect",
+        "MLIRArithDialect",
+        "MLIRArithValueBoundsOpInterfaceImpl",
         "MLIRCAPIFunc",
         "MLIRCAPIIR",
         "MLIRCAPIControlFlow",
@@ -99,6 +102,7 @@ fn main() {
         "MLIRFuncDialect",
         "MLIRIR",
         "MLIRInferTypeOpInterface",
+        "MLIRInferIntRangeCommon",
         "MLIRInferIntRangeInterface",
         "MLIRPDLToPDLInterp",
         "MLIRParser",
diff --git a/src/circt-sys/wrapper.h b/src/circt-sys/wrapper.h
index 28a1e3afd..c789d3175 100644
--- a/src/circt-sys/wrapper.h
+++ b/src/circt-sys/wrapper.h
@@ -25,7 +25,6 @@
 #include "mlir-c/IR.h"
 #include "mlir-c/IntegerSet.h"
 #include "mlir-c/Pass.h"
-#include "mlir-c/Registration.h"
 #include "mlir-c/Support.h"
 #include "mlir-c/Transforms.h"
 
diff --git a/src/circt/src/cf.rs b/src/circt/src/cf.rs
index eaad28a9c..25e13787a 100644
--- a/src/circt/src/cf.rs
+++ b/src/circt/src/cf.rs
@@ -30,13 +30,10 @@ impl CondBranchOp {
             state.add_operand(condition);
             state.add_successor(true_dest);
             state.add_successor(false_dest);
-            let vector_ty = unsafe {
-                mlirVectorTypeGet(1, [3].as_ptr(), get_integer_type(builder.cx, 32).raw())
-            };
-            let vector_attr = Attribute::from_raw(unsafe {
-                mlirDenseElementsAttrInt32Get(vector_ty, 3, [1, 0, 0].as_ptr())
+            let dense_array_attr = Attribute::from_raw(unsafe {
+                mlirDenseI32ArrayGet(builder.cx.raw(), 3, [1, 0, 0].as_ptr())
             });
-            state.add_attribute("operand_segment_sizes", vector_attr);
+            state.add_attribute("operand_segment_sizes", dense_array_attr);
         })
     }
 }
diff --git a/src/circt/src/llhd.rs b/src/circt/src/llhd.rs
index dc854f285..2119114ee 100644
--- a/src/circt/src/llhd.rs
+++ b/src/circt/src/llhd.rs
@@ -229,14 +229,14 @@ impl InstanceOp {
         builder.build_with(|builder, state| {
             let num_inputs = inputs.into_iter().map(|v| state.add_operand(v)).count();
             let num_outputs = outputs.into_iter().map(|v| state.add_operand(v)).count();
-            let vector_attr = Attribute::from_raw(unsafe {
-                mlirDenseElementsAttrInt32Get(
-                    mlirVectorTypeGet(1, [2].as_ptr(), get_integer_type(builder.cx, 32).raw()),
+            let dense_array_attr = Attribute::from_raw(unsafe {
+                mlirDenseI32ArrayGet(
+                    builder.cx.raw(),
                     2,
                     [num_inputs as _, num_outputs as _].as_ptr(),
                 )
             });
-            state.add_attribute("operand_segment_sizes", vector_attr);
+            state.add_attribute("operand_segment_sizes", dense_array_attr);
             state.add_attribute("name", get_string_attr(builder.cx, name));
             state.add_attribute("callee", get_flat_symbol_ref_attr(builder.cx, module));
         })
@@ -383,17 +383,14 @@ impl WaitOp {
             if let Some(time) = time {
                 state.add_operand(time);
             }
-            let vector_ty = unsafe {
-                mlirVectorTypeGet(1, [3].as_ptr(), get_integer_type(builder.cx, 32).raw())
-            };
-            let vector_attr = Attribute::from_raw(unsafe {
-                mlirDenseElementsAttrInt32Get(
-                    vector_ty,
+            let dense_array_attr = Attribute::from_raw(unsafe {
+                mlirDenseI32ArrayGet(
+                    builder.cx.raw(),
                     3,
                     [observed.len() as _, time.is_some() as _, 0].as_ptr(),
                 )
             });
-            state.add_attribute("operand_segment_sizes", vector_attr);
+            state.add_attribute("operand_segment_sizes", dense_array_attr);
         })
     }
 }
diff --git a/src/circt/src/mlir/mod.rs b/src/circt/src/mlir/mod.rs
index ea9919a81..75b684331 100644
--- a/src/circt/src/mlir/mod.rs
+++ b/src/circt/src/mlir/mod.rs
@@ -96,7 +96,7 @@ pub trait OperationExt: WrapRaw<RawType = MlirOperation> {
         unsafe {
             let flags = mlirOpPrintingFlagsCreate();
             if with_debug_info {
-                mlirOpPrintingFlagsEnableDebugInfo(flags, false);
+                mlirOpPrintingFlagsEnableDebugInfo(flags, with_debug_info, false);
             }
             mlirOperationPrintWithFlags(
                 self.raw(),