md: remove extra bus arbitration delays

Commit history shows that these were initially added to get audio working in OverDrive 2, but now it works better without them.

Having these additional delays present caused audio to stop working late in overdrive 2's execution, most likely due to causing extended delays and confusing timing sensitive code.

ares/md/apu/bus.cpp

@@ -33,8 +33,6 @@ auto APU::write(n16 address, n8 data) -> void {
 }
 
 auto APU::readExternal(n24 address) -> n8 {
-  //bus arbiter delay rough approximation (2-5 cycles)
-  step(4);
   while(MegaDrive::bus.acquired() && !scheduler.synchronizing()) step(1);
   MegaDrive::bus.acquire(MegaDrive::Bus::APU);
 
@@ -56,8 +54,6 @@ auto APU::readExternal(n24 address) -> n8 {
 }
 
 auto APU::writeExternal(n24 address, n8 data) -> void {
-  //bus arbiter delay rough approximation
-  step(4);
   while(MegaDrive::bus.acquired() && !scheduler.synchronizing()) step(1);
   MegaDrive::bus.acquire(MegaDrive::Bus::APU);
 

ares/md/bus/inline.hpp

@@ -32,7 +32,6 @@ alwaysinline auto Bus::read(n1 upper, n1 lower, n24 address, n16 data) -> n16 {
 
   if(address >= 0xa00000 && address <= 0xa0ffff) {
     if(!apu.busgrantedCPU()) return data;
-    if(cpu.active()) cpu.wait(11);  //todo: inaccurate approximation of Z80 RAM access delay
     address.bit(15) = 0;  //a080000-a0ffff mirrors a00000-a07fff
     //word reads load the even input byte into both output bytes
     auto byte = apu.read(address | !upper);  //upper==0 only on odd byte reads
@@ -94,7 +93,6 @@ alwaysinline auto Bus::write(n1 upper, n1 lower, n24 address, n16 data) -> void
 
   if(address >= 0xa00000 && address <= 0xa0ffff) {
     if(!apu.busgrantedCPU()) return;
-    if(cpu.active()) cpu.wait(11);  //todo: inaccurate approximation of Z80 RAM access delay
     address.bit(15) = 0;  //a08000-a0ffff mirrors a00000-a07fff
     //word writes store the upper input byte into the lower output byte
     return apu.write(address | !upper, data.byte(upper));  //upper==0 only on odd byte reads