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Custom_RISC_Implementation
Custom_RISC_Implementation PublicAn attempt at making a customised RISC processor with five pipelined stages and supporting all RISC-V instruction set
SystemVerilog 3
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Tiva-C-Projects
Tiva-C-Projects PublicDemonstration of various peripherals and components of the Tiva-C Launchpad with TM4C123GXL
C
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