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put the idx arguments of simd_insert and simd_extract into const blocks #1530

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merged 2 commits into from
Feb 17, 2024
Merged

put the idx arguments of simd_insert and simd_extract into const blocks #1530

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c8342fe
put the idx arguments of simd_insert and simd_extract into const blocks
RalfJung Feb 17, 2024
b754cf2
avoid using simd_extract in SimdTy::extract (since the index is not a…
RalfJung Feb 17, 2024
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400 changes: 200 additions & 200 deletions crates/core_arch/src/aarch64/neon/generated.rs
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24 changes: 12 additions & 12 deletions crates/core_arch/src/aarch64/neon/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -436,7 +436,7 @@ pub unsafe fn vcopy_laneq_s64<const LANE1: i32, const LANE2: i32>(
) -> int64x1_t {
static_assert!(LANE1 == 0);
static_assert_uimm_bits!(LANE2, 1);
transmute::<i64, _>(simd_extract(b, LANE2 as u32))
transmute::<i64, _>(simd_extract!(b, LANE2 as u32))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -451,7 +451,7 @@ pub unsafe fn vcopy_laneq_u64<const LANE1: i32, const LANE2: i32>(
) -> uint64x1_t {
static_assert!(LANE1 == 0);
static_assert_uimm_bits!(LANE2, 1);
transmute::<u64, _>(simd_extract(b, LANE2 as u32))
transmute::<u64, _>(simd_extract!(b, LANE2 as u32))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -466,7 +466,7 @@ pub unsafe fn vcopy_laneq_p64<const LANE1: i32, const LANE2: i32>(
) -> poly64x1_t {
static_assert!(LANE1 == 0);
static_assert_uimm_bits!(LANE2, 1);
transmute::<u64, _>(simd_extract(b, LANE2 as u32))
transmute::<u64, _>(simd_extract!(b, LANE2 as u32))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -481,7 +481,7 @@ pub unsafe fn vcopy_laneq_f64<const LANE1: i32, const LANE2: i32>(
) -> float64x1_t {
static_assert!(LANE1 == 0);
static_assert_uimm_bits!(LANE2, 1);
transmute::<f64, _>(simd_extract(b, LANE2 as u32))
transmute::<f64, _>(simd_extract!(b, LANE2 as u32))
}

/// Load multiple single-element structures to one, two, three, or four registers.
Expand Down Expand Up @@ -749,7 +749,7 @@ pub unsafe fn vld1q_dup_f64(ptr: *const f64) -> float64x2_t {
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vld1_lane_f64<const LANE: i32>(ptr: *const f64, src: float64x1_t) -> float64x1_t {
static_assert!(LANE == 0);
simd_insert(src, LANE as u32, *ptr)
simd_insert!(src, LANE as u32, *ptr)
}

/// Load one single-element structure to one lane of one register.
Expand All @@ -760,7 +760,7 @@ pub unsafe fn vld1_lane_f64<const LANE: i32>(ptr: *const f64, src: float64x1_t)
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vld1q_lane_f64<const LANE: i32>(ptr: *const f64, src: float64x2_t) -> float64x2_t {
static_assert_uimm_bits!(LANE, 1);
simd_insert(src, LANE as u32, *ptr)
simd_insert!(src, LANE as u32, *ptr)
}

/// Store multiple single-element structures from one, two, three, or four registers.
Expand Down Expand Up @@ -2038,7 +2038,7 @@ pub unsafe fn vmovq_n_f64(value: f64) -> float64x2_t {
#[cfg_attr(test, assert_instr(mov))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vget_high_f64(a: float64x2_t) -> float64x1_t {
float64x1_t(simd_extract(a, 1))
float64x1_t(simd_extract!(a, 1))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -2047,7 +2047,7 @@ pub unsafe fn vget_high_f64(a: float64x2_t) -> float64x1_t {
#[cfg_attr(test, assert_instr(ext))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vget_high_p64(a: poly64x2_t) -> poly64x1_t {
transmute(u64x1::new(simd_extract(a, 1)))
transmute(u64x1::new(simd_extract!(a, 1)))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -2056,7 +2056,7 @@ pub unsafe fn vget_high_p64(a: poly64x2_t) -> poly64x1_t {
#[cfg_attr(test, assert_instr(nop))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vget_low_f64(a: float64x2_t) -> float64x1_t {
float64x1_t(simd_extract(a, 0))
float64x1_t(simd_extract!(a, 0))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -2065,7 +2065,7 @@ pub unsafe fn vget_low_f64(a: float64x2_t) -> float64x1_t {
#[cfg_attr(test, assert_instr(nop))]
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
pub unsafe fn vget_low_p64(a: poly64x2_t) -> poly64x1_t {
transmute(u64x1::new(simd_extract(a, 0)))
transmute(u64x1::new(simd_extract!(a, 0)))
}

/// Duplicate vector element to vector or scalar
Expand All @@ -2076,7 +2076,7 @@ pub unsafe fn vget_low_p64(a: poly64x2_t) -> poly64x1_t {
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(nop, IMM5 = 0))]
pub unsafe fn vget_lane_f64<const IMM5: i32>(v: float64x1_t) -> f64 {
static_assert!(IMM5 == 0);
simd_extract(v, IMM5 as u32)
simd_extract!(v, IMM5 as u32)
}

/// Duplicate vector element to vector or scalar
Expand All @@ -2087,7 +2087,7 @@ pub unsafe fn vget_lane_f64<const IMM5: i32>(v: float64x1_t) -> f64 {
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(nop, IMM5 = 0))]
pub unsafe fn vgetq_lane_f64<const IMM5: i32>(v: float64x2_t) -> f64 {
static_assert_uimm_bits!(IMM5, 1);
simd_extract(v, IMM5 as u32)
simd_extract!(v, IMM5 as u32)
}

/// Vector combine
Expand Down
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